Lenovo HS22V Betriebsanweisung PDF herunterladen (Seite 7)

High-performance blade server optimized for virtualization

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Execute Disable Bit functionality can help prevent certain classes of malicious buffer overflow

attacks when combined with a supporting operating system.

Intel’s Virtualization Technology (VT) integrates hardware-level virtualization hooks that allow

operating system vendors to better utilize the hardware for virtualization workloads.

DDR3 Registered Memory with Active Memory Protection

The HS22V uses registered double data rate III (DDR3) VLP (very-low-profile) DIMMs and

provides Active Memory features, including advanced Chipkill memory protection, for up to 16X

better error correction than standard ECC memory. In addition to offering triple the memory

bandwidth of registered or fully-buffered DDR2 memory, DDR3 memory also uses less energy.

1.8V DDR2 memory already offered up to 37% lower energy use than fully buffered memory.

Now, a generation later, 1.5V DDR3 memory is even more efficient, using 10-15% less energy

than DDR2 memory. For even greater efficiency, the HS22V also supports 1.35V DDR3 memory,

which uses up to 19% less energy than 1.5V DDR3 DIMMs.

The HS22V supports up to 288GB of memory in eighteen DIMM slots. Redesign in the

architecture of the 5500 series and 5600 series processors bring radical changes in the way

memory works in these servers. For example, the Xeon 5500 series and 5600 series processors

integrate the memory controller inside the processor, resulting in two memory controllers in a

two-socket system. Each memory controller has three memory channels. Depending on the type

of memory, population of memory, and processor model, the memory may be clocked at

1333MHz, 1066MHz or 800MHz.

Note: If only one processor is installed, only the first nine DIMM slots can be used. Adding a

second processor not only doubles the amount of memory available for use, but also doubles the

number of memory controllers, thus doubling the system memory bandwidth. If you add a second

processor, but no additional memory for the second processor, the second processor has to

access the memory from the first processor “remotely,” resulting in longer latencies and lower

performance. The latency to access remote memory is almost 75% higher than local memory

access. So, the goal should be to always populate both processors with an equal number of

DIMMs, with matching pairs spanning the processors.

The 1333MHz E56xx, L5640, and X56xx processor models support up to 1333MHz memory

clock speed and 2 DIMMs per channel (2DPC) at 1333MHz with single-rank and dual-rank

RDIMMs and UDIMMs running at 1.5V. Other 5600 series processors access memory at

1066MHz. The E550x models support memory at 800MHz only.

Running memory at 1333MHz (where supported) versus 1066MHz offers up to 9% better

performance, while running memory at 1066MHz produces up to 28% better performance than

memory running at 800MHz.

Xeon 5600 series and 5500 series processors access memory with almost 50% lower latency

than the previous generation 5400 series processors. That can result in faster processing of

latency-sensitive workloads.

This new processor design comes with some trade-offs in memory capacity, performance, and

cost: For example, more lower-cost/lower-capacity DIMMs mean lower memory speed.

Alternatively, fewer higher-capacity DIMMs cost more but offer higher performance.

Regardless of memory speed, the Xeon 5600 series and 5500 series platform represents a

significant improvement in memory bandwidth over the previous Xeon 5400 platform. At

16: DIMM population sequence;

D16: DIMM slot assignments

1 2 3 4 5 6 7 8 9 10 11 12 ... 21 22

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