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Document Number: 318080-002 5
Figures
2-1 Quad-Core Intel® Xeon® L7345 Processor Load Current versus Time .....................27
2-2 Dual-Core Dual-Core Intel® Xeon® Processor 7200 Series Load Current
versus Time......................................................................................................28
2-3 Quad-Core Intel
®
Xeon
®
Processor 7200 Series and 7300 Series Load Current versus
Time28
2-4 Quad-Core Intel® Xeon® X7350 Processor Load Current versus Time .................29
2-5 Quad-Core Intel
®
Xeon
®
Processor 7200 Series and 7300 Series VCC Static and Transient
Tolerance Load Lines .........................................................................................31
2-6 Quad-Core Intel® Xeon® X7350 Processor VCC Static and Transient Tolerance
Load Lines........................................................................................................32
2-7 Quad-Core Intel® Xeon® L7345 Processor V
CC
Static and Transient Tolerance
Load Lines........................................................................................................33
2-8 Dual-Core Intel® Xeon® Processor 7200 Series VCC Static and Transient
Tolerance Load Lines .........................................................................................34
2-9 Input Device Hysteresis .....................................................................................37
2-10 VCC Overshoot Example Waveform......................................................................38
2-11 Electrical Test Circuit .........................................................................................46
2-12 TCK Clock Waveform .........................................................................................46
2-13 Differential Clock Waveform................................................................................47
2-14 Differential Clock Crosspoint Specification.............................................................47
2-15 BCLK Waveform at Processor Pad and Pin.............................................................48
2-16 FSB Common Clock Valid Delay Timing Waveform .................................................48
2-17 FSB Source Synchronous 2X (Address) Timing Waveform .......................................49
2-18 FSB Source Synchronous 4X (Data) Timing Waveform............................................50
2-19 TAP Valid Delay Timing Waveform .......................................................................51
2-20 Test Reset (TRST#), Async GTL+ Input, and PROCHOT# Timing Waveform............... 51
2-21 THERMTRIP# Power Down Sequence ...................................................................51
2-22 SMBus Timing Waveform....................................................................................52
2-23 SMBus Valid Delay Timing Waveform ...................................................................52
2-24 Voltage Sequence Timing Requirements ...............................................................53
2-25 FERR#/PBE# Valid Delay Timing .........................................................................54
2-26 VID Step Timings ..............................................................................................54
2-27 VID Step Times and Vcc Waveforms ....................................................................55
3-1 Processor Package Assembly Sketch ....................................................................57
3-2 Processor Package Drawing (Sheet 1 of 2)............................................................58
3-3 Processor Package Drawing (Sheet 2 of 2)............................................................59
3-4 Top Side Board Keepout Zones (Part 1)................................................................61
3-5 Top Side Board Keepout Zones (Part 2)................................................................62
3-6 Bottom Side Board Keepout Zones.......................................................................63
3-7 Board Mounting-Hole Keepout Zones ...................................................................64
3-8 Volumetric Height Keep-Ins ................................................................................65
3-9 Processor Topside Markings................................................................................68
3-10 Processor Bottom-Side Markings .........................................................................68
3-11 Processor Pin-Out Coordinates, Top View..............................................................69
6-1 Quad-Core Intel® Xeon® E7300 Processor Thermal Profile.....................................97
6-2 Quad-Core Intel® Xeon® X7350 Processor Thermal Profile.....................................98
6-3 Quad-Core Intel® Xeon® L7345 Processor Thermal Profile................................... 100
6-4 Dual-Core Intel® Xeon® Processor 7200 Series Thermal Profile ........................... 101
6-5 Case Temperature (TCASE) Measurement Location .............................................. 103
6-6 Thermal Monitor 2 Frequency and Voltage Ordering ............................................. 105
6-7 PECI Topology ................................................................................................ 107
- Processor 7200 Series 1
- Contents 3
- 4 Document Number: 318080-002 4
- Document Number: 318080-002 5 5
- 6 Document Number: 318080-002 6
- Document Number: 318080-002 7 7
- Revision History 8
- 1 Introduction 9
- 1.1 Terminology 11
- Introduction 12
- 1.2 State of Data 13
- 1.3 References 13
- 2 Electrical Specifications 15
- Clocking 16
- 2.3.2 PLL Power Supply 17
- Electrical Specifications 18
- Table 2-4. FSB Signal Groups 21
- Asynchronous Signals 22
- 2.9 Mixing Processors 23
- CC_VTT_OUT 27
- Time Duration (s) 28
- Sustained Current (A) 28
- Table 2-10. V 30
- Load Lines 32
- Static and Transient 34
- Tolerance Load Lines 34
- Specifications 35
- 2.11.2.1 DC Characteristics 36
- 2.11.3 V 37
- Overshoot Specification 37
- Example Overshoot Waveform 38
- Tp = T1: BCLK[1:0] period 47
- THERMTRIP# 51
- Figure 2-26. VID Step Timings 54
- 3 Mechanical Specifications 57
- Mechanical Specifications 58
- 3.7 Processor Materials 67
- 3.8 Processor Markings 68
- Processor 69
- 4 Pin Listing 71
- 10 of 16) 75
- 11 of 16) 76
- 12 of 16) 76
- 13 of 16) 77
- 14 of 16) 77
- 15 of 16) 78
- 16 of 16) 78
- 1 of 14) 79
- 2 of 14) 79
- 3 of 14) 80
- 4 of 14) 80
- 5 of 14) 81
- 6 of 14) 81
- 8 of 14) 82
- 7 of 14) 82
- 9 of 14) 83
- 10 of 14) 83
- 11 of 14) 84
- 12 of 14) 84
- 13 of 14) 85
- 14 of 14) 85
- Pin Listing 86
- 5 Signal Definitions 87
- CC and BCLK have reached 92
- 6 Thermal Specifications 95
- CASE_MAX 96
- Thermal Profile 98
- = 0.162 x Power + 45 98
- Pow er (W) 100
- Temperature (C) 100
- = 0.420 x Power + 45 100
- = 0.238 x Power + 45 101
- 6.1.2 Thermal Metrology 102
- 6.2.2 Thermal Monitor 103
- 6.2.3 Thermal Monitor 2 104
- 6.2.4 On-Demand Mode 105
- 6.2.5 PROCHOT# Signal 106
- 6.2.6 FORCEPR# Signal 106
- 6.2.7 THERMTRIP# Signal 106
- 6.3.1 Introduction 107
- 6.3.2 PECI Specifications 108
- 7 Features 111
- 7.2.1 Normal State 112
- EXTENDED_HALT 113
- 7.2.3 Stop-Grant State 114
- 7.3 Enhanced Intel SpeedStep 115
- Technology 115
- Features 116
- 7.4.1 SMBus Device Addressing 117
- Transactions 118
- 7.4.3.1 Header 121
- 7.4.3.2 Processor Data 125
- 7.4.3.3 Processor Core Data 126
- 16h-19h 127
- 1Ah-1Bh 127
- Offset: 1Ch 128
- 1Dh-1Eh 128
- 1Fh-20h 128
- 7.4.3.4 Cache Data 129
- 7.4.3.5 Package Data 131
- 7.4.3.6 Part Number Data 132
- 38h-3Eh 133
- 3Fh-4Ch 133
- 4Dh=54h 133
- 55h-6Eh 134
- 71h-72h 134
- 7.4.3.8 Feature Data 135
- 7.4.3.9 Other Data 136
- 7.4.4 Checksums 137
- 7.4.5 Scratch EEPROM 137
- 8.1 Introduction 139
- 8.2 Thermal Specifications 139
- 9 Debug Tools Specifications 141
- Debug Tools Specifications 142
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