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Document Number: 318080-002 35
Electrical Specifications
Notes:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. The V
TT
referred to in these specifications refers to instantaneous V
TT
.
3. Refer to the processor I/O Buffer Models for I/V characteristics.
4. Measured at 0.1*V
TT
.
5. Measured at 0.9*V
TT
.
6. For Vin between 0 V and V
TT
. Measured when the driver is tristated.
7. This is the measurement at the pin.
Notes:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. Measured at 0.2*V
TT
.
3. V
OH
is determined by value of the external pullup resistor to V
TT
. Please refer to platform design guide for
details.
4. For V
IN
between 0 V and V
OH
.
5. This is the measurement at the pin.
Notes:
1. These parameters are based on design characterization and are not tested.
2. All DC specifications for the SMBus signal group are measured at the processor pins.
3. Platform designers may need this value to calculate the maximum loading of the SMBus and to determine
maximum rise and fall times for SMBus signals.
2.11.2 Platform Environmental Control Interface (PECI) DC
Specifications
PECI is an Intel proprietary one-wire bus interface that provides a communication
channel between Intel processor and external thermal monitoring devices. The Dual-
Core Intel® Xeon® Processor 7200 Series and Quad-Core Intel® Xeon® Processor
Table 2-12. CMOS Signal Input/Output Group DC Specifications
Symbol Parameter Min Typ Max Units Notes
1
V
IL
Input Low Voltage -0.10 0.00 0.3*V
TT
V2,3
V
IH
Input High Voltage 0.7*V
TT
V
TT
V
TT
+0.1 V 2
V
OL
Output Low Voltage -0.10 0 0.1*V
TT
V2
V
OH
Output High Voltage 0.9*V
TT
V
TT
V
TT
+0.1 V 2
I
OL
Output Low Current 1.70 N/A 4.70 mA 4
I
OH
Output High Current 1.70 N/A 4.70 mA 5
I
LI
Input Leakage Current N/A N/A +/- 100 μA6,7
Table 2-13. Open Drain Signal Group DC Specifications
Symbol Parameter Min Typ Max Units Notes
1
V
OL
Output Low Voltage N/A 0.20 V 3
V
OH
Output High Voltage V
TT
-5% V
TT
V
TT
+5% V
I
OL
Output Low Current 16 N/A 50 mA 2
I
LO
Leakage Current N/A N/A +/- 200 μA4,5
Table 2-14. SMBus Signal Group DC Specifications
Symbol Parameter Min Max Unit Notes
1, 2
V
IL
Input Low Voltage -0.30 0.30 * SM_VCC V
V
IH
Input High Voltage 0.70 * SM_VCC 3.465 V
V
OL
Output Low Voltage 0 0.400 V
I
OL
Output Low Current N/A 3.0 mA
I
LI
Input Leakage Current N/A ± 10 µA
I
LO
Output Leakage Current N/A ± 10 µA
C
SMB
SMBus Pin Capacitance 15.0 pF 3
- Processor 7200 Series 1
- Contents 3
- 4 Document Number: 318080-002 4
- Document Number: 318080-002 5 5
- 6 Document Number: 318080-002 6
- Document Number: 318080-002 7 7
- Revision History 8
- 1 Introduction 9
- 1.1 Terminology 11
- Introduction 12
- 1.2 State of Data 13
- 1.3 References 13
- 2 Electrical Specifications 15
- Clocking 16
- 2.3.2 PLL Power Supply 17
- Electrical Specifications 18
- Table 2-4. FSB Signal Groups 21
- Asynchronous Signals 22
- 2.9 Mixing Processors 23
- CC_VTT_OUT 27
- Time Duration (s) 28
- Sustained Current (A) 28
- Table 2-10. V 30
- Load Lines 32
- Static and Transient 34
- Tolerance Load Lines 34
- Specifications 35
- 2.11.2.1 DC Characteristics 36
- 2.11.3 V 37
- Overshoot Specification 37
- Example Overshoot Waveform 38
- Tp = T1: BCLK[1:0] period 47
- THERMTRIP# 51
- Figure 2-26. VID Step Timings 54
- 3 Mechanical Specifications 57
- Mechanical Specifications 58
- 3.7 Processor Materials 67
- 3.8 Processor Markings 68
- Processor 69
- 4 Pin Listing 71
- 10 of 16) 75
- 11 of 16) 76
- 12 of 16) 76
- 13 of 16) 77
- 14 of 16) 77
- 15 of 16) 78
- 16 of 16) 78
- 1 of 14) 79
- 2 of 14) 79
- 3 of 14) 80
- 4 of 14) 80
- 5 of 14) 81
- 6 of 14) 81
- 8 of 14) 82
- 7 of 14) 82
- 9 of 14) 83
- 10 of 14) 83
- 11 of 14) 84
- 12 of 14) 84
- 13 of 14) 85
- 14 of 14) 85
- Pin Listing 86
- 5 Signal Definitions 87
- CC and BCLK have reached 92
- 6 Thermal Specifications 95
- CASE_MAX 96
- Thermal Profile 98
- = 0.162 x Power + 45 98
- Pow er (W) 100
- Temperature (C) 100
- = 0.420 x Power + 45 100
- = 0.238 x Power + 45 101
- 6.1.2 Thermal Metrology 102
- 6.2.2 Thermal Monitor 103
- 6.2.3 Thermal Monitor 2 104
- 6.2.4 On-Demand Mode 105
- 6.2.5 PROCHOT# Signal 106
- 6.2.6 FORCEPR# Signal 106
- 6.2.7 THERMTRIP# Signal 106
- 6.3.1 Introduction 107
- 6.3.2 PECI Specifications 108
- 7 Features 111
- 7.2.1 Normal State 112
- EXTENDED_HALT 113
- 7.2.3 Stop-Grant State 114
- 7.3 Enhanced Intel SpeedStep 115
- Technology 115
- Features 116
- 7.4.1 SMBus Device Addressing 117
- Transactions 118
- 7.4.3.1 Header 121
- 7.4.3.2 Processor Data 125
- 7.4.3.3 Processor Core Data 126
- 16h-19h 127
- 1Ah-1Bh 127
- Offset: 1Ch 128
- 1Dh-1Eh 128
- 1Fh-20h 128
- 7.4.3.4 Cache Data 129
- 7.4.3.5 Package Data 131
- 7.4.3.6 Part Number Data 132
- 38h-3Eh 133
- 3Fh-4Ch 133
- 4Dh=54h 133
- 55h-6Eh 134
- 71h-72h 134
- 7.4.3.8 Feature Data 135
- 7.4.3.9 Other Data 136
- 7.4.4 Checksums 137
- 7.4.5 Scratch EEPROM 137
- 8.1 Introduction 139
- 8.2 Thermal Specifications 139
- 9 Debug Tools Specifications 141
- Debug Tools Specifications 142
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