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Intel® Xeon® Processor 7400 Series Datasheet 31
Electrical Specifications
Notes:
1. The V
CC_MIN
and V
CC_MAX
loadlines represent static and transient limits. Please see Section 2.11.2 for VCC
overshoot specifications.
2. Refer to Table 2-9 for processor VID information.
3. Refer to Table 2-10 for V
CC
Static and Transient Tolerance.
4. The load lines specify voltage limits at the die measured at the VCC_SENSE and VSS_SENSE pins and the
VCC_SENSE2 and VSS_SENSE2 pins. Voltage regulation feedback for voltage regulator circuits must also
be taken from the processor VCC_SENSE2 and VSS_SENSE2 pins. Refer to the Voltage Regulator Module
(VRM) and Enterprise Voltage Regulator Down (EVRD) 11.0 Design Guidelines for socket load line
guidelines and VR implementation. Please refer to the appropriate platform design guide for details on VR
implementation.
5. Icc values greater than 95 A are not applicable for the Ultra Dense Intel® Xeon® Processor 7400 Series.
6. Icc values greater than 130 A are not applicable for the Rack Optimized Intel® Xeon® Processor 7400
Series.
Notes:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. V
IL
is defined as the maximum voltage level at a receiving agent that will be interpreted as a logical low
value.
3. V
IH
is defined as the minimum voltage level at a receiving agent that will be interpreted as a logical high
value.
4. This is the pull down driver resistance. Measured at 0.33*V
TT
. Refer to processor I/O Buffer Models for I/V
characteristics
5. GTLREF should be generated from V
TT
with a 1% tolerance resistor divider. The V
TT
referred to in these
specifications is the instantaneous V
TT
.
6. Specified when on-die R
TT
and R
ON
are turned off. V
IN
between 0 and V
TT
.
7. This is the measurement at the pin.
Figure 2-4. V
CC
Static and Transient Tolerance Load Lines
VID - 0.000
VID - 0.050
VID - 0.100
VID - 0.150
VID - 0.200
VID - 0.250
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130 135 140 145 150
Icc [A]
Vcc [V]
V
CC
Maximum
V
CC
Typical
V
CC
Minimum
Table 2-11. AGTL+ Signal Group DC Specifications
Symbol Parameter Min Typ Max Units Notes
1
V
IL
Input Low Voltage -0.10 0 GTLREF-0.10 V 2, 4, 6
V
IH
Input High Voltage GTLREF+0.10 V
TT
V
TT
+0.10 V 3, 6
V
OH
Output High Voltage V
TT
- 0.10 N/A V
TT
V4, 6
R
ON
Buffer On Resistance 7 9 11 Ω 5
I
LI
Input Leakage Current N/A N/A +/-100 μA7, 8
- Datasheet 1
- Contents 3
- Revision History 7
- 1 Introduction 9
- 1.1 Terminology 11
- Introduction 12
- 1.2 State of Data 13
- 1.3 References 13
- 2 Electrical Specifications 15
- 2.2 Decoupling Guidelines 16
- Clocking 16
- 2.3.2 PLL Power Supply 18
- Electrical Specifications 20
- Table 2-4. FSB Signal Groups 21
- Asynchronous Signals 22
- 2.9 Mixing Processors 23
- Time Duration (s) 28
- Sustained Current (A) 28
- Table 2-10. V 30
- Figure 2-4. V 31
- 2.11.2 V 33
- Overshoot Specification 33
- 2.11.3 Die Voltage Validation 33
- 2.11.4.1 DC Characteristics 34
- 2.12 AGTL+ FSB Specifications 35
- Tp = T1: BCLK[1:0] period 42
- THERMTRIP# 46
- System bus 48
- FERR#/PBE# 48
- Figure 2-22. VID Step Timings 49
- 3 Mechanical Specifications 51
- Mechanical Specifications 52
- 3.7 Processor Materials 61
- 3.8 Processor Markings 62
- Processor 63
- 4 Pin Listing 65
- (Sheet 3 of 16) 66
- (Sheet 4 of 16) 66
- (Sheet 5 of 16) 67
- (Sheet 6 of 16) 67
- (Sheet 7 of 16) 68
- (Sheet 8 of 16) 68
- (Sheet 9 of 16) 69
- (Sheet 10 of 16) 69
- (Sheet 11 of 16) 70
- (Sheet 12 of 16) 70
- (Sheet 13 of 16) 71
- (Sheet 14 of 16) 71
- (Sheet 15 of 16) 72
- (Sheet 16 of 16) 72
- (Sheet 1 of 14) 73
- (Sheet 2 of 14) 73
- (Sheet 3 of 14) 74
- (Sheet 4 of 14) 74
- (Sheet 5 of 14) 75
- (Sheet 6 of 14) 75
- (Sheet 7 of 14) 76
- (Sheet 8 of 14) 76
- (Sheet 9 of 14) 77
- (Sheet 10 of 14) 77
- (Sheet 11 of 14) 78
- (Sheet 12 of 14) 78
- (Sheet 13 of 14) 79
- (Sheet 14 of 14) 79
- Pin Listing 80
- 5 Signal Definitions 81
- FSB agents 85
- . The processor includes 86
- 6 Thermal Specifications 89
- CASE_MAX 90
- CASE (°C) 91
- = 0.431 x Power + 45 95
- Power (W) 96
- Temperature (C) 96
- 6.1.2 Thermal Metrology 97
- 6.2.2 Intel Thermal Monitor 97
- 6.2.3 Intel Thermal Monitor 2 98
- 6.2.4 On-Demand Mode 99
- 6.2.5 PROCHOT# Signal 100
- 6.2.6 FORCEPR# Signal 100
- 6.2.7 THERMTRIP# Signal 100
- 6.3.1 Introduction 101
- 6.3.1.1 T 102
- 6.3.2.1 PECI Device Address 103
- 6.3.2.2 PECI Command Support 103
- 7 Features 105
- 7.2.2.1 HALT State 106
- 7.2.2.2 Extended HALT State 106
- 7.2.3 Stop-Grant State 108
- 7.3 Enhanced Intel SpeedStep 109
- Technology 109
- Features 110
- 7.4.1 SMBus Device Addressing 111
- Transactions 112
- 7.4.3.1 Header 115
- 7.4.3.2 Processor Data 119
- 0Eh-13h 120
- 7.4.3.3 Processor Core Data 121
- Offset: 1Ah-1Bh 122
- 7.4.3.4 Cache Data 124
- Offset: 29h-2Ah 125
- 2Bh-2Ch 125
- 2Dh-2Eh 125
- 7.4.3.5 Package Data 126
- 7.4.3.6 Part Number Data 127
- 38h-3Eh 128
- 3Fh-4Ch 128
- 4Dh=54h 128
- 55h-6Eh 128
- 71h-72h 129
- 7.4.3.8 Feature Data 130
- 7.4.3.9 OD: Other Data 131
- 7.4.4 Checksums 132
- 7.4.5 Scratch EEPROM 132
- 8 Debug Tools Specifications 133
- Debug Tools Specifications 134
- 9.1 Introduction 135
- 9.2 Thermal Specifications 135
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