Lenovo AD80582QH056003 Datenblatt Seite 130

  • Herunterladen
  • Zu meinen Handbüchern hinzufügen
  • Drucken
  • Seite
    / 136
  • Inhaltsverzeichnis
  • LESEZEICHEN
  • Bewertet. / 5. Basierend auf Kundenbewertungen
Seitenansicht 129
Features
130 Intel® Xeon® Processor 7400 Series Datasheet
7.4.3.8 Feature Data
This section provides information on key features that the platform may need to
understand without powering on the processor.
7.4.3.8.1 PCFF: Processor Core Feature Flags
This location contains a copy of results in EDX[31:0] from Function 1 of the CPUID
instruction. These details provide instruction and feature support by product family. A
decode of these bits is found in the AP-485 Intel
®
Processor Identification and CPUID
Instruction application note. Writes to this register have no effect.
7.4.3.8.2 PFF: Processor Feature Flags
This location contains additional feature information from the processor. Writes to this
register have no effect.
Note: Bit 5 and Bit 6 are mutually exclusive (only one bit will be set).
Bits are set when a feature is present, and cleared when they are not.
Example: The Intel® Xeon® Processor 7400 Series does not support a SMBus
Thermal Sense Device, supports either a Serial Signature or Electronic signature,
supports an OEM EEPROM, supports Core VID and supports an L3 Cache. Offset 78h
will contain A7h or C7h (167 or 199 decimal).
7.4.3.8.3 PTCI: Processor Thread and Core Information
This location contains information regarding the number of cores and threads on the
processor. Writes to this register have no effect.
Example: The Intel® Xeon® Processor 7400 Series has two, four or six cores and one
thread per core. Therefore, this register will have a value of 9h, 11h or 19h.
Offset: 74h-77h
Bit Description
31:0 Processor Core Feature Flags
0000h-FFFFF: Feature Flags
Offset: 78h
Bit Description
7 Multi-Core (set if the processor is a multi core processor)
6 Serial signature (set if there is a serial signature at offset 4D - 54h)
5 Electronic signature present (set if there is a electronic signature at 4D - 54h)
4 Thermal Sense Device present (set if an SMBus thermal sensor on package)
3 Reserved
2 OEM EEPROM present (set if there is a scratch ROM at offset 80 - FFh)
1 Core VID present (set if there is a VID provided by the processor)
0 L3 Cache present (set if there is a level 3 cache on the processor)
Seitenansicht 129

Kommentare zu diesen Handbüchern

Keine Kommentare