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Intel® Xeon® Processor 7400 Series Datasheet 109

Features

While in the Stop-Grant state, SMI#, INIT#, BINIT# and LINT[1:0] will be latched by

the processor, and only serviced when the processor returns to the Normal state. Only

one occurrence of each event will be recognized upon return to the Normal state.

While in Stop-Grant state, the processor will process snoops on the front side bus and it

will latch interrupts delivered on the front side bus.

The PBE# signal can be driven when the processor is in Stop-Grant state. PBE# will be

asserted if there is any pending interrupt latched within the processor. Pending

interrupts that are blocked by the EFLAGS.IF bit being clear will still cause assertion of

PBE#. Assertion of PBE# indicates to system logic that it should return the processor to

the Normal state.

7.2.4 Extended HALT Snoop or HALT Snoop State, Stop Grant

Snoop State

The Extended HALT Snoop state is used in conjunction with the Extended HALT state. If

the Extended HALT state is not enabled in the BIOS, the default Snoop state entered

will be the HALT Snoop state. Refer to the sections below for details on HALT Snoop

state, Stop Grant Snoop state and Extended HALT Snoop state.

7.2.4.1 HALT Snoop State, Stop Grant Snoop State

The processor will respond to snoop or interrupt transactions on the front side bus

while in Stop-Grant state or in HALT state. During a snoop or interrupt transaction, the

processor enters the HALT/Grant Snoop state. The processor will stay in this state until

the snoop on the front side bus has been serviced (whether by the processor or another

agent on the front side bus) or the interrupt has been latched. After the snoop is

serviced or the interrupt is latched, the processor will return to the Stop-Grant state or

HALT state, as appropriate.

7.2.4.2 Extended HALT Snoop State

The Extended HALT Snoop state is the default Snoop state when the Extended HALT

state is enabled via the BIOS. The processor will remain in the lower bus to core

frequency ratio and VID operating point of the Extended HALT state.

While in the Extended HALT Snoop state, snoops and interrupt transactions are handled

the same way as in the HALT Snoop state. After the snoop is serviced or the interrupt is

latched, the processor will return to the Extended HALT state.

7.3 Enhanced Intel SpeedStep

Technology

Intel® Xeon® Processor 7400 Series support Enhanced Intel SpeedStep

Technology.

This technology enables the processor to switch between multiple frequency and

voltage points, which results in platform power savings. Enhanced Intel SpeedStep

Technology requires support for dynamic VID transitions in the platform. Switching

between voltage/frequency states is software controlled.

Note: Not all Intel® Xeon® Processor 7400 Series may be capable of supporting Enhanced

Intel SpeedStep Technology. More details on which processor frequencies will support

this feature will be provided in future releases of the Intel® Xeon® Processor 7400

Series Specification Update when available.

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