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Low Voltage Intel
®
Xeon
™
Processor at 1.60 GHz, 2.0 GHz and 2.4 GHz
94 Datasheet
The return from a System Management Interrupt (SMI) handler may be to either Normal Mode or
the AutoHALT Power Down state. See the
Intel Architecture Software Developer's Manual,
Volume III: System Programmer's Guide
for more information.
The system may generate a STPCLK# while the processor is in the AutoHALT Power Down state.
When the system deasserts the STPCLK# interrupt, the processor may return execution to the
HALT state.
7.2.3 Stop-Grant State—State 3
When the STPCLK# pin is asserted, the Stop-Grant state of the processor is entered 20 bus clocks
after the response phase of the processor-issued Stop Grant Acknowledge special bus cycle. Once
the STPCLK# pin has been asserted, it may only be deasserted once the processor is in the Stop
Grant state. Both logical processors of the Low Voltage Intel Xeon processor must be in the Stop
Grant state before the deassertion of STPCLK#.
Since the AGTL+ signal pins receive power from the system bus, these pins should not be driven
(allowing the level to return to V
CC) for minimum power drawn by the termination resistors in this
state. In addition, all other input pins on the system bus should be driven to the inactive state.
Figure 36. Stop Clock State Machine
2. Auto HALT Power Down State
BCLK running
Snoops and interrupts allowed
1. Normal State
Normal execution
4. HALT/Grant Snoop State
BCLK running
Service snoops to caches
3. Stop Grant State
BCLK running
Snoops and interrupts allowed
5. Sleep State
BCLK running
No snoops or interrupts
allowed
HALT Instruction and
HALT Bus Cycle Generated
Snoop
Event
Occurs
Snoop
Event
Serviced
INIT#, BINIT#, INTR, NMI,
SMI#, RESET#
STPCLK#
Asserted
STPCLK#
De-asserted
S
T
P
C
L
K
#
A
s
s
e
r
t
e
d
S
T
P
C
L
K
#
D
e
-
a
s
s
e
r
t
e
d
SLP#
Asserted
SLP#
De-asserted
Snoop Event Occurs
Snoop Event Serviced
.
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