Lenovo 59P5107 Datenblatt Seite 4

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Low Voltage Intel
®
Xeon
Processor at 1.60 GHz, 2.0 GHz and 2.4 GHz
Contents
4 Datasheet
4.5 Materials.............................................................................................................................57
4.6 Markings .............................................................................................................................58
4.7 Processor Pin-Out Diagram................................................................................................58
5.0 Pin Listing and Signal Definitions .............................................................................................61
5.1 Processor Pin Assignments................................................................................................61
5.1.1 Pin Listing by Pin Name.........................................................................................61
5.1.2 Pin Listing by Pin Number .....................................................................................70
5.2 Signal Definitions................................................................................................................79
6.0 Thermal Specifications ...............................................................................................................89
6.1 Thermal Specifications .......................................................................................................89
6.2 Measurements for Thermal Specifications .........................................................................90
6.2.1 Processor Case Temperature Measurement.........................................................90
7.0 Features........................................................................................................................................ 93
7.1 Power-On Configuration Options........................................................................................93
7.2 Clock Control and Low Power States .................................................................................93
7.2.1 Normal State—State 1...........................................................................................93
7.2.2 AutoHALT Powerdown State—State 2..................................................................93
7.2.3 Stop-Grant State—State 3.....................................................................................94
7.2.4 HALT/Grant Snoop State—State 4........................................................................95
7.2.5 Sleep State—State 5.............................................................................................95
7.2.6 Bus Response During Low Power States..............................................................96
7.3 Thermal Monitor..................................................................................................................96
7.3.1 Thermal Diode .......................................................................................................96
7.4 Thermal Diode ....................................................................................................................97
8.0 Debug Tools Specifications .......................................................................................................99
8.1 Logic Analyzer Interface (LAI) ............................................................................................99
8.1.1 Mechanical Considerations....................................................................................99
8.1.2 Electrical Considerations.......................................................................................99
9.0 Appendix A.................................................................................................................................101
9.1 Processor Core Frequency Determination .......................................................................101
Figures
1 Typical VCCIOPLL, VCCA and VSSA Power Distribution..........................................................16
2 Phase Lock Loop (PLL) Filter Requirements..............................................................................16
3 Low Voltage Intel
®
Xeon
Processor Voltage and
Current Projections in a Dual-Processor Configuration..............................................................24
4 Electrical Test Circuit..................................................................................................................32
5 TCK Clock Waveform .................................................................................................................32
6 Differential Clock Waveform.......................................................................................................33
7 Differential Clock Crosspoint Specification.................................................................................33
9 System Bus Source Synchronous 2X (Address) Timing Waveform...........................................34
8 System Bus Common Clock Valid Delay Timing Waveform ......................................................34
10 System Bus Source Synchronous 4X (Data) Timing Waveform ................................................35
11 System Bus Reset and Configuration Timing Waveform ...........................................................36
12 Power-On Reset and Configuration Timing Waveform ..............................................................36
13 TAP Valid Delay Timing Waveform ............................................................................................37
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